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19-2558; Rev 0; 6/02
MAX1165 Evaluation Kit
General Description
The MAX1165 evaluation kit (EV kit) is an assembled and tested circuit board that demonstrates the MAX1165 analog-to-digital converter. The EV kit can also evaluate the MAX1065/MAX1066 and MAX1165/ MAX1166. Request free samples of the desired parts when ordering the MAX1165 EV kit. o Proven PC Board Layout o Convenient On-Board Test Points o Fully Assembled and Tested
Features
Evaluates: MAX1165/MAX1166/MAX1065/MAX1066
Ordering Information
PART MAX1165EVKIT TEMP RANGE 0C to +70C IC PACKAGE 28 TSSOP
Component List
DESIGNATION C1, C2, C11, C12 C3, C4, C5, C8, C9, C10 C6 C7 C7, R2 H1 JU1-JU6 R1 R2 U1 U2 U3 None None None QTY 4 6 1 1 4 1 6 1 1 1 1 1 1 1 1 DESCRIPTION 10F, 10V X7R ceramic capacitors Taiyo Yuden LMK325BJ106MN 0.1F, 10V X7R ceramic capacitors 4.7F, 10V X7R ceramic capacitor Taiyo Yuden JMK212BJ475KG 0.01F ceramic capacitor Socket-pin receptacles 2 x 16 dual-row vertical header 2-pin headers 100k 5% resistor 4.7 5% resistor MAX1165BEUI Hex Schmitt trigger buffer 74HC14 MAX4430ESA MAX1165 EV kit PC board MAX1165 data sheet MAX1165 EV kit data sheet
Quick Start
Recommended Equipment
* * * * * MAX1165 EV kit Two DC power supplies, 5V at 10mA Programmable signal generator, such as Tektronix DG2020A Logic analyzer (optional) Reconstruction DAC (optional)
Procedure
The MAX1165 EV kit is fully assembled and tested. Follow these steps to verify board operation. Do not turn on the power supply until all connections are completed. 1) Ensure that JU1, JU2, and JU3 are open (see Table 1). 2) With the power off, connect the first 5VDC power supply between AVDD and AGND. 3) With the power off, connect the second 5VDC power supply between DVDD and DGND. Note: DGND and AGND are connected on the MAX1165 EV kit board. To avoid ground loops, do not connect AGND to DGND at any other location. 4) Configure the pattern generator to produce the appropriate read/convert (R/C) and conversion start (CS) waveforms. Refer to Figure 2 in the MAX1165 data sheet. 5) Connect the pattern generator CS output across jumper JU4. 6) Connect the pattern generator R/C output across jumper JU5. 7) Connect logic analyzer or other digital data capture system to header H1. The least significant bit, D0, appears on H1 pin 1, and the end-of-conversion output strobe (EOC) appears across jumper JU6 (see Table 2). 8) Turn on the power supplies and enable the pattern generator. 9) Apply 0 to 4.096V analog input signal between pads AIN and AGND. Capture digital data from header H1.
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Component Supplier
SUPPLIER Taiyo Yuden PHONE FAX WEBSITE www.t-yuden.com 800-348-2496 847-925-0899
Note: Please indicate that you are using the MAX1165 when contacting these component suppliers.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
MAX1165 Evaluation Kit Evaluates: MAX1165/MAX1166/MAX1065/MAX1066
Detailed Description of Hardware
The MAX1165 (U1) is a single-channel, 16-bit dataacquisition system. Anti-alias filtering is performed by R2 and C7. The input signal can be applied directly to the AIN pad, or an optional MAX4430 precision buffer (U3) can be used instead. Capacitors C4 and C6 bypass the reference. Schmitt trigger (U2) ensures proper system timing by keeping the CS rising and falling edges clean.
Evaluating the MAX1165/MAX1166 and MAX1065/MAX1066
The MAX1166 has an 8-bit interface. Its high-byte enable (HBEN) is on the pad labeled RESET. To evaluate the MAX1166, request a free sample of the MAX1166BEUP. Remove the MAX1165 and install the MAX1166, leaving U1 pins 1-4 and 25-28 unconnected. The MAX1065 is a 14-bit version of the MAX1165. To evaluate the MAX1065, request a free sample of the MAX1065AEUI. Remove the MAX1165 and install the MAX1065. The MAX1066 is a 14-bit version of the MAX1165, with an 8-bit interface. Its high-byte enable (HBEN) is on the pad labeled RESET. To evaluate the MAX1066, request a free sample of the MAX1066AEUP. Remove the MAX1165 and install the MAX1066, leaving U1 pins 1-4 and 25-28 unconnected. See Table 2 for device comparison.
Analog Input Buffer
When powered from 5V supplies, the analog input buffer (U3) has an input common-mode range of -2.5V to +4.1V. 1) With the power off, connect the +5VDC power supply between BUF+5 and AGND. 2) With the power off, connect the -5VDC power supply between BUF-5 and AGND. 3) With the power off, connect the DC power supply ground return to AGND. 4) Install a shunt across jumper JU3. 5) Apply analog input signal to BUFIN pad. If the full unipolar 0 to 5V range is needed, apply +7V to BUF+5 and -3V to BUF-5. The input common-mode range is -0.5V to +6.1V.
Troubleshooting
Problem: no output measurement. System seems to report zero voltage, or fails to make a measurement. Check AVDD and DVDD supply voltages. Check the 4.096V reference voltage using a digital voltmeter. Use an oscilloscope to verify the R/C, CS, and EOC signals. Ensure that a resistor is installed in socket R2; otherwise, the analog input is unconnected. If using the input buffer U3, ensure that the 5V power supply is connected and JU3 is closed. Problem: measurements are erratic, unstable; poor accuracy. Check the reference voltage using a digital voltmeter. Use an oscilloscope to check for noise. When probing for noise, keep the oscilloscope ground return lead as short as possible, preferably less than 1/2in (10mm). Increase C6 and C7 capacitance. Short JU1 and apply an external 4.096V reference at REF to improve accuracy. Check for ground loops in your system.
Generating a Crossplot
To see a visual indication of relative LSB size and DNL performance, create a crossplot fixture using a function generator, a latch, a resistor network, and an oscilloscope. Latch the data on the falling edge of EOC. Connect the least significant bits together, using resistors of varying weights (for example, D0 = 75.0k 1%, D1 = 39.1k 1%, D2 = 20.0k 1%, D3 = 10.0k 1%, D4 = 4.99k 1%). Drive the analog inputs with a linear ramping signal, such as a 100Hz triangle wave. Connect an oscilloscope in X-Y mode with X = analog input and Y = weighted sum of the latched digital outputs. The resulting staircase plot gives a visual indication of relative LSB sizes and DNL performance.
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MAX1165 Evaluation Kit Evaluates: MAX1165/MAX1166/MAX1065/MAX1066
Table 1. Jumper Functions
JUMPER JU1 JU2 JU3 JU4 JU5 JU6 FUNCTION Leave JU1 open to enable the internal reference. Short JU1 when applying an external reference at REF. Momentarily short JU2 to reset U1 (MAX1165/MAX1065 only). Leave JU2 open and apply high-byte enable signal (HBEN) at the RESET pad (MAX1166/MAX1066 only). Short JU3 to drive analog input from MAX4430 buffer U3. Leave JU3 open when driving AIN directly through R2. Apply conversion start signal (CS) across JU4 Apply read/convert signal (R/C) across JU5 Obtain end-of-conversion (EOC) signal from JU6
Table 2. Device Comparison
PART RESOLUTION INTERFACE WIDTH H1-1 signal H1-3 signal H1-5 signal H1-7 signal H1-9 signal H1-11 signal H1-13 signal H1-15 signal H1-17 signal H1-19 signal H1-21 signal H1-23 signal H1-25 signal H1-27 signal H1-29 signal H1-31 signal RESET pad MAX1165 16 bit 16 bit D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 RESET MAX1166 16 bit 8 bit D0/D8 D1/D9 D2/D10 D3/D11 Not used Not used Not used Not used Not used Not used Not used Not used D4/D12 D5/D13 D6/D14 D7/D15 HBEN MAX1065 14 bit 16 bit Not used Not used D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 RESET MAX1066 14 bit 8 bit D0/D8 D1/D9 D2/D10 D3/D11 Not used Not used Not used Not used Not used Not used Not used Not used D4/D12 D5/D13 D6/0 D7/0 HBEN
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MAX1165 Evaluation Kit Evaluates: MAX1165/MAX1166/MAX1065/MAX1066
BUF +5 C11 10F 10V H1-17 C9 0.1F H1-19 H1-21 7 6 3 4 C8 0.1F 2 U3 H1-25 H1-23
HEADER 32-PIN
1 2 3 4 5 6 7 8
D8 D9 D10 D11 D12 D13 D14 D15 (MSB) U1
D7 D6 D5 D4 D3 D2 D1 D0
28 27 26 25 24 23 22 21
H1-15 H1-13 H1-11 H1-9 H1-7 H1-5 H1-3 H1-1
H1-18 H1-20 H1-22 H1-24 H1-26 H1-28 H1-30 H1-32
H1-16 H1-14 H1-12 H1-10 H1-8 H1-6 H1-4 H1-2
MAX4430
BUFIN H1-27 H1-29 H1-31
C12 10F 10V
JU5
9
R/C
MAX1165
DVDD 20 C5 0.1F
DVDD DVDD C2 10F 10V DGND
JU3
BUF-5 JU6 10 EOC DGND 19
AVDD AVDD C1 10F 10V AGND R2 4.7 AIN C7 0.01F AGND 14 AGND C3 0.1F 12 AGND 11 AVDD
CS
18
2 U2-A 74HC14
1
4 U2-B 74HC14
3
JU4
RESET REF 13
17 16 C6 4.7F
RESET REF R1 100k
JU2 DVDD
AIN AVDD REFCAP 15 C4 0.1F JU1 DVDD C10 0.1F
Figure 1. MAX1165 EV Kit Schematic
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MAX1165 Evaluation Kit Evaluates: MAX1165/MAX1166/MAX1065/MAX1066
Figure 2. MAX1165 EV Kit Component Placement Guide-- Component Side
Figure 3. MAX1165 EV Kit PC Board Layout--Component Side
Figure 4. MAX1165 EV Kit PC Board Layout--Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 5 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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